1. Field of the Invention
The present invention relates to a semiconductor circuit which is formed on a semiconductor substrate, and, for example, to an oscillating circuit which comprises a plurality of inverters connected in series.
2. Description of the Prior Art
It has been known that an oscillating circuit is constructed when a plurality of inverters which invert the input signal are connected in series. When these inverters are composed of MOS transistors, all elements composing the oscillator circuit can be formed on a semiconductor substrate.
FIG. 11 is a circuit diagram showing an example of such a kind of oscillating circuit. The oscillating circuit, as shown by a dot-and-dash line in FIG. 11, comprises six inverters connected in series. The output of the last one of these inverters is fed back to the first one of those via NAND gate G1.
In FIG. 11, PMOS transistors P1-P8 and NMOS transistors N1-N8 act as limiters restricting the current which is supplied to the inverters INV11-INV16. A resistor R1 is connected to the PMOS transistor P1 in series. The current I flowing through the resistor R1 is detected by PMOS transistor P1. The gate electrodes of the PMOS transistors P1-P8 are connected to each other. Since the gate voltages of the transistors P1-P8 are the same, the current flowing through the PMOS transistors P2-P8 is limited by the current I flowing through the resistor R1.
NMOS transistor N2 is connected to the PMOS transistor P2 in series. Since the gate electrodes of NMOS transistors N2-N8 are connected to each other, the current flowing through the NMOS transistors N2-N8 is also limited by the current I flowing through the resistor R1.
Furthermore, when the size of the PMOS transistors P9-P14 composing the inverters INV11-INV16 is larger than that of the PMOS transistors P3-P8, and the size of the NMOS transistors N9-N14 is larger than that of the NMOS transistors N3-N8, the current flowing through nodes n1-n6 shown in FIG. 11 is also limited by the current I flowing through the resistor R1.
Each pair of capacitors PC1-PC6 constructed by PMOS transistors and the corresponding capacitors NC1-NC6 constructed by NMOS transistors is connected to the nodes n1-n6, respectively. These capacitors repeat the electric charge and discharge operation depending on the voltage level of the nodes n1-n6.
The electric charge amount of the nodes n1-n6 is determined by each capacitance C of the nodes n1-n6 and the power supply voltage VDD. The delay time T for signal transmission at each one of the inverters shown in FIG. 11 is given by equation (1). EQU T=C*VDD/I (1)
The current I flowing through the resistor R1 is determined by the voltage VDD and the resistance R of the resistor R1, and is given by equation (2). EQU I=VDD/R (2)
As a result, the delay time T for signal transmission at each one of the inverters is given by equation (3). EQU T=C*R (3)
From the equation (3), it can be seen that the delay time T is not dependent on the power supply voltage VDD, and is determined by the resistance R of the resistor R1 and each capacitance C of the nodes n1-n6.
FIG. 12 is an equivalent circuit diagram of the oscillating circuit in FIG. 11. In FIG. 12, the circuit is simplified by replacing the PMOS transistors P3-P8 by the resistors R13-R18, the NMOS transistors N3-N8 by the resistors R23-R28, and each pair of the capacitors PC1-PC6 and the corresponding capacitors NC1-NC6 connected to the nodes n1-n6 by the capacitors C11-C16, respectively.
The oscillation frequency of the circuit in FIG. 12 can be controlled by changing the capacitance of the capacitors C11-C16. Moreover, the frequency can also be controlled by utilizing the fact that the current flowing through the resistors R13-R18 and R23-R28 in FIG. 12 changes depending on change of the resistance of resistor R1, which is shown in FIG. 11 and omitted in FIG. 12.
As described above, the conventional oscillating circuit in FIG. 11 has the advantage that the circuit can set the oscillation frequency without being affected by change of the power supply voltage and can be formed easily on the semiconductor substrate, since the circuit is able to composed of a plurality of MOS transistors.
When the oscillating circuit in FIG. 11 is formed on the semiconductor substrate, the resistor R1 shown in FIG. 11 is usually formed by utilizing a diffusion resistor. However, if an improvement of the voltage-resistant property or the like is performed, the concentration of the diffusion layer may change in response thereto, and if the concentration of the diffusion layer changes, the resistance of the resistor R1 may change and as a result, it may be necessary to change the circuit configuration.